ICEBreaker V1.0e FPGA µðÁöÅÐ °³¹ß º¸µå ±×·¡ÇÈ ÇÁ·Î±×·¡¹Ö ½±°Ô RISC-V ½ÇÇà
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ÀÌ°ÍÀº ¸ÚÁø °¡Á¦Æ®, ¿ÀÇ ¼Ò½º, FPGA °³¹ß º¸µå·Î µðÁöÅÐ ³í¸® µðÀÚÀÎÀ» ½±°Ô ¿¬±¸ ÇÒ ¼ö ÀÖ½À´Ï´Ù.
»õ·Î¿î ¼¼»óÀÇ µðÁöÅÐ ³í¸® µðÀÚÀÎÀ» ¸ðÇèÇÒ Áغñ°¡ µÇ¼Ì½À´Ï±î? V1.0 E FPGA °³¹ß º¸µå´Â Ưº°È÷ ¼³°èµÇ¾ú½À´Ï´Ù. ¿ÀÇ ¼Ò½º FPGA °³¹ß µµ±¸¸¦ »ç¿ëÇÏ°í Â÷¼¼´ë CPU ¾ÆÅ°ÅØó¸¦ ¿¸é picorv 32, pico - ac ¹× rISC -v CPU ¼ÒÇÁÆ® ÄÚ¾î, °³¹ß º¸µå´Â pmod Ä¿³ØÅ͸¦ ÅëÇØ ½±°Ô Ÿ»ç pmod ¸ðµâÀ» È®ÀåÇÏ°í »ç¿ëÇÒ ¼ö ÀÖ½À´Ï´Ù. V1.0 e FPGA º¸µå¿¡´Â 3 °³ÀÇ Ç¥ÁØ pmod Ä¿³ØÅÍ, usb to uart ºê¸®Áö, spi Ç÷¡½Ã ¸Þ¸ð¸®¿Í È¥ÇÕ ÇÒ ÀÏ·ÃÀÇ ¹öÆ°°ú LED°¡ ±ô¹ÚÀ̸é È®Àå ¿É¼Ç ¹üÀ§°¡ ¸Å¿ì ³Ð¾îÁý´Ï´Ù. Pmod´Â ¿©·¯ Çϵå¿þ¾î Á¦Á¶¾÷ü°¡ µû¶ó¾ß ÇÒ ±âÁØÀ̱⠶§¹®ÀÔ´Ï´Ù. À̸¦ ÅëÇØ ¸¹Àº ¼öÀÇ ¸ðµâ ¶óÀ̺귯¸®¿¡ ¾×¼¼½º ÇÒ ¼ö ÀÖ½À´Ï´Ù. ÇÁ·ÎÁ§Æ®°¡ ¹«¾ùÀÌµç °ü°è¾øÀÌ È®½ÇÈ÷ pmod¸¦ ãÀ» ¼ö ÀÖ½À´Ï´Ù.
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ICEºê·¹ÀÌÄ¿ V1.0 e FPG
O 5280 ³í¸® ´ÜÀ§ (4 - LUT + ½ÃÇÁÆ® + FF)
O 120 kbit µà¾ó Æ÷Æ® RAM
O 1 Mbit (128 KByte) ´ÜÀÏ Æ÷Æ® RAM
O PLL, SPI, 2x2 xI2C Çϵå IP
O °£´ÜÇÑ ¼³°è¿¡ »ç¿ëµÇ´Â µÎ °³ÀÇ ³»ºÎ ¹ßÁø±â (10 kHz ¹× 48 MHz)
O ¿Àµð¿À ÇÕ¼º°ú °°Àº ½ÅÈ£ 󸮿¡ »ç¿ëµÇ´Â 8 °³ÀÇ DSP ½Â¼ö ¹× ¼ÒÇÁÆ®¿þ¾î Á¤ÀÇ ¶óµð¿À.
O ÀúÀü·Â ¼Òºñ´Â ¹èÅ͸® ±¸µ¿ ÀÀ¿ë ÇÁ·Î±×·¥¿¡ ÀÌ»óÀûÀÔ´Ï´Ù.
O 24 ma µå¶óÀ̺ê 3 °³ ¹× IP ÆÞ½º Æø º¯Á¶ 3 °³ (RGB LED ¹× ¼ÒÇü ¸ðÅÍ)
? dzºÎÇÏ°í ºü¸¥ ÀúÀå
O 128 Mbit (16 MB) 4 °³ÀÇ SPI ÀÌÁß µ¥ÀÌÅÍ ¼Óµµ (QSPI - DDR) Ç÷¡½Ã ¸Þ¸ð¸®
O ¿¹: ºñµð¿À¸¦ LED ¸ÅÆ®¸¯½º·Î Àü¼ÛÇÒ ¼ö ÀÖ½À´Ï´Ù
? ¸¹Àº ¼öÀÇ I/O
O RGB LED 3 ÇÉ (Çìµå)
O 2 ´ëÀÇ ÀÚµ¿Â÷ LED
O °¡»ó Á÷·Ä Æ÷Æ® (USB) ¸¦ ÅëÇØ UART ¹× TX ¹× RX ÇÉ ÇÉ¿¡ ¾×¼¼½º
O A ¹öÆ°
O »ç¿ë °¡´ÉÇÑ µÎ °³ÀÇ pmod Ä¿³ØÅÍ (16 x ÇÉ ¼ö)
O º°µµÀÇ PMOD (8 ÇÉ)
? ¹è¼± ºÐ¸® pmod ¸ðµâ
O »ç¿ëÀÚ´Â ÀÔ·Â ¹× Ãâ·Â¿¡ ¾×¼¼½º ÇÒ ¼ö ÀÖÀ¸¸ç ÀÚ½ÅÀÇ Çϵå¿þ¾î ¼³°è¿¡ »ç¿ëÇÒ ¼ö ÀÖ½À´Ï´Ù.
O 5 ¼º±Þ LED
O ¼¼ °³ÀÇ ¹öÆ°
? CPU ¼ÒÇÁÆ® Äھ ¼ö¿ëÇϱâ À§ÇØ
O ÇÇÄÚ¸£ºê 32
O Picosoc
O RISC -v ¹× ±âŸ
? Fpga ÇÁ·Î±×·¡¹Ö ÀåÄ¡ ¹× usb - to - serial ¾î´ðÅÍ ¿Âº¸µå
O icestorm iceprog µµ±¸¿Í ȣȯ °¡´É
O Á÷·Ä ÀåÄ¡ ¹× È£½ºÆ® °£´ÜÇÑ ¿¬°á
? USB °í¼Ó
O ¿Âº¸µå FT 2232 USB Ĩ
O ÃÖ´ë 480 mbit/s È£½ºÆ® ÀÎÅÍÆäÀ̽º
¿ÀÇ ¼Ò½º µµ±¸ ¸µÅ©:
ICEBreakeFPGA ÇÁ·ÎÅä ŸÀÔÀº ´ÙÀ½ FPGA µðÀÚÀÎ µµ±¸¸¦ ¿¾î Áö¿øµÇ¾ú½À´Ï´Ù.
? Yosys: Verilog RTL ªÀº http:// www.clifford.at/yosys/ÇÁ·¹ÀÓ ¿öÅ©
? Arachne - PNR: FPGA https://github.com/YosysHQ/arachne-pnr iCE40 Á¦Ç°±ºÀ»À§ÇÑ Àå¼Ò ¹× °æ·Î µµ±¸
? Nextpnr: https://github.com/YosysHQ/nextpnr º¥´õ Á߸³, ŸÀÌ¹Ö Á᫐ FPGA Àå¼Ò ¹× °æ·Î µµ±¸
? IceStorm: iCE40 FPGA¸¦À§ÇÑ ºñÆ® ½ºÆ®¸²À» ºÐ¼®ÇÏ°í »ý¼ºÇϱâÀ§ÇÑ µµ±¸ http:// www.clifford.at/icestorm/
? Icestudio: https://github.com/FPGAwars/icestudio FPGA º¸µå¸¦À§ÇÑ IceStorm ±â¹Ý ºñÁÖ¾ó ÆíÁý±â
? ¹Ì°Õ: ÆÄÀ̽㠱â¹Ý FPGA Çϵå¿þ¾î µðÀÚÀÎ ÅøŶ https://github.com/m-labs/migen
https://www.crowdsupply.com/1bitsquared/icebreaker-fpga
ÁÖ¹® À̸ÞÀÏ¿¡ ¸Þ½ÃÁö¸¦ ³²°Ü Á¤º¸ ÆÑÀ» º¸³»ÁֽʽÿÀ.
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